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RISC-V in Your Browser with Verilog
https://8bitworkshop.com/docs/posts/2025/riscv-verilog.html
Published: November 8, 2025 06:00
RISC-V is the fifth generation of an open CPU architecture with its roots in academia. Now that it is headed for ISO/IEC standardization, it’s attracting more interest.One nice thing about the RISC-V instruction set is its modularity. There are 32-bit and…
The Three-Stream Versatile Kernel
https://8bitworkshop.com/docs/posts/2025/versatile-three-stream-kernel.html
Published: October 13, 2025 05:00
In my previous article on the Versatile Playfield Kernel, we explored how to draw complex backgrounds by choosing which register to update on each scanline. But this version didn’t address sprites in particular.Becuase the playfield logic only took up to…
The Versatile Playfield Kernel
https://8bitworkshop.com/docs/posts/2025/versatile-playfield-kernel.html
Published: October 11, 2025 05:00
In Atari 2600 programming, we struggle to draw two sprites and the playfield (background) within the 76-cycle budget of each scanline. For maximum-resolution single-line updates where we change parameters every scanline, we’d need to look up and write:2…
Tiny Atari 2600 ROMs
https://8bitworkshop.com/docs/posts/2025/tiny-vcs-kernels.html
Published: July 26, 2025 05:00
On the Atari 2600, a kernel is the term for the highly-optimized assembly code that draws the display, i.e. “races the beam”.I was pondering a question: What’s the smallest Atari 2600 kernel you can write?I found this AtariAge thread which packs entire…